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Company Name

QunaSys Co., Ltd.

Job Type

Compiler Engineer

Work Detail

A startup working on the social implementation of quantum computers is seeking a compiler engineer! Job Summary - Design and development of IR (Intermediate Representation), ISA (Instruction Set Architecture), and transformation/optimization paths for FTQC architecture implementation - Design and implementation of transpiler/compiler functions in QURI SDK (Quantum Application Development Platform) - Design and development of a user-friendly quantum programming language - Implementation of performance evaluation functions utilizing hardware/architecture-dependent noise models - Collaboration with researchers and developers on specification review and performance tuning Background of Recruitment Towards the realization of full-scale FTQC, the importance of quantum hardware and compiler infrastructure that supports suitable architectures is increasing. QunaSys is strengthening the development of quantum compilers essential for realizing FTQC on actual hardware, and is also working on integrating user-defined quantum algorithms into the QURI SDK, which maps them to various architectures and performs performance evaluations. This aims to provide higher user value in the increasingly complex development of quantum applications. This recruitment seeks engineers to be involved in the development of IR (Intermediate Representation), ISA (Instruction Set Architecture), and transformation/optimization paths that support these efforts.

Ideal Profile

Required Skills * Development experience with compilers and transpilers (LLVM, MLIR, or custom-built systems are acceptable) * Experience developing medium-to-large-scale software in C++, Rust, or Python * Basic knowledge of quantum circuits and quantum algorithms * Understanding of algorithms and data structures * Experience in team development using Git, etc. Preferred Skills * Mathematical knowledge (linear algebra, graph theory, optimization, etc.) * Experience using quantum SDKs such as Qiskit, Cirq, or PennyLane * Knowledge of quantum error correction * Experience designing intermediate representations (IRs) and implementing optimization paths * Development experience in HPC or distributed processing environments Desired Candidate Profile * Ability to design and implement abstract specifications and new models by taking initiative * Interest in multiple layers (algorithms to physical layers) and the ability to view the overall structure * Ability to continuously improve quality through team discussions and feedback * Enjoy venturing into uncharted territory

Work Location

113-0001 1-13-7 Hakusan, Bunkyo-ku, Tokyo, Aqua Hakusan Building 9F Remote work (You can work from home or the office) [Head Office Access] 6-minute walk from Hakusan Station on the Toei Mita Line 10-minute walk from Kasuga Station on the Toei Oedo Line

Phd. Stating Salary

Annual salary: ¥6,000,000 - ¥10,000,000 *Salary will be determined based on previous work experience and skills. (2-month probationary period)

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